1. Field
Exemplary embodiments of the present invention relate to a memory and a memory system including the same.
2. Description of the Related Art
A memory cell of a memory includes a transistor serving as a switch and a capacitor serving to store a charge (data). Depending on whether a charge is stored in the capacitor of the memory cell, that is, whether a terminal voltage of the capacitor is high or low, the data may be divided into logic high (logic 1) and logic low (logic 0) data.
Data is stored in such a manner that charge is accumulated in a capacitor. Thus, no power is consumed in maintaining stored data in theory. However, since current leakage occurs at the PN junction of MOS transistors, the initial charge stored in the capacitor may be lost, resulting in the corresponding data being lost. To prevent data loss, data of the memory cell is read and the charge is stored again based on the read information, before the data is lost. This process, called a refresh operation, is periodically performed to maintain the data.
FIG. 1 is a diagram illustrating part of a cell array included in a memory that will be used to explain word line disturbance. In FIG. 1, ‘BL’ represents a bit line.
In FIG. 1, ‘WLK−1’, ‘WLK’, and ‘WLK+1’ in the cell array represent three word lines arranged in parallel. Furthermore, word line WLK with ‘HIGH_ACT’ represents a word line with high activity, and word lines WLK−1 and WLK+1 represent word lines arranged adjacent to the word line WLK. Furthermore, ‘CELL_K−1’, ‘CELL_K’, and ‘CELL_K+1’ represent memory cells coupled to the word lines WLK−1, WLK, and WLK+1, respectively. The memory cells CELL_K−1, CELL_K and CELL_K+1 include cell transistors TR_K−1, TR_R, and TR_K+1 and cell capacitors CAP_K−1, CAP_K, and CAP_K+1, respectively.
In FIG. 1, when the word line WLK is activated and precharged (deactivated), the voltages of the word lines WLK−1 and WLK+1 are increased and decreased by a coupling effect between the word line WLK and the word lines WLK−1 and WLK+1, thereby influencing charges stored in the cell capacitors CAP_K−1 and CAP_K+1. Thus, when the word line WLK is frequently activated-precharged to toggle between the active state and the precharge state, the data stored in the memory cells CELL_K−1 and CELL_K+1 may be lost by the change in charge stored in the capacitors CAP_K−1 and CAP_K+1.
Furthermore, electronic waves, generated while a word line toggles between the active state and the precharge state, may introduce/discharge electrons into/from a cell capacitor included in a memory cell coupled to an adjacent word line, potentially losing the data of the memory cell.